Configuring Blank Lines
There are rules which will check for blank lines either above or below a line. These rules are designed to improve readability by separating code using blank lines.
There are several options to these rules:
Option |
Values |
Default |
Description |
|---|---|---|---|
|
|
Rule dependent |
|
This is an example of how to configure the options.
rule :
architecture_015:
style : require_blank_line
Warning
It is important to be aware these rules may conflict with rules that enforce rules on previous lines. This can occur when a below rule is applied and then on the next line a previous rule applies. Resolve any conflicts by changing the configuration of either rule.
Example: style set to require_blank_line
The following code would fail with this option:
architecture rtl of fifo is
-- Comment
architecture rtl of fifo is
signal s_sig1 : std_logic;
The following code would pass with this option:
architecture rtl of fifo is
-- Comment
architecture rtl of fifo is
signal s_sig1 : std_logic;
Example: style set to no_blank_line
The following code would fail with this option:
architecture rtl of fifo is
-- Comment
architecture rtl of fifo is
signal s_sig1 : std_logic;
The following code would pass with this option:
architecture rtl of fifo is
-- Comment
architecture rtl of fifo is
signal s_sig1 : std_logic;
Example: style set to require_blank_line_unless_pragma
The following code would fail with this option:
architecture rtl of fifo is
-- synthesis translate_off
architecture rtl of fifo is
signal s_sig1 : std_logic;
The following code would pass with this option:
architecture rtl of fifo is
-- synthesis translate_off
architecture rtl of fifo is
signal s_sig1 : std_logic;