Configuring VHDL Reserved Words
The VHDL Language Reference Manual (LRM) has a section listed reserved words. The use of these words are restricted in identifiers and names.
There are rules which can check for use of reserved words where they should not be used. These rules provide the following options:
Option |
Values |
Default Value |
Description |
---|---|---|---|
|
|
|
|
This is an example of how to configure these options.
rule :
reserved_001:
standard: 'all'
Note
The following examples are using rule reserved_001.
Example: standard
set to 1987
The null
keyword is a reserved word in the 1987 standard.
Violation
entity null is end entity;
Example: standard
set to 1993
The rol
keyword is a reserved word in the 1993 standard.
Violation
entity rol is end entity;
Example: standard
set to 2008
The context
keyword is a reserved word in the 2008 standard.
Violation
entity context is end entity;